Bypassing the Data cache in a Nios II Processor

Question

I have the following C source files which need to have some code removed and some code added to bypass the data cache on the Nios_2_r2c processor. I have no clue how to do this.

File: switches.c

#include "system.h"
#include "pio_regs.h"
#include "bsu_macros.h"
#include "switches.h"

static struct pio_regs *SW = (struct pio_regs *)SWITCH_BASE;
static REGISTER SH_SW;

bits get_RUN ( void ) {
    SH_SW = SW->data;
    return getbit(SH_SW, 17);
}

File: ledr.c

#include "system.h"
#include "pio_regs.h"
#include "bsu_macros.h"
#include "ledr.h"

static struct pio_regs *LEDR = (struct pio_regs *)LEDR_BASE;
static REGISTER SH_LEDR;

void LEDR_Init ( void ) {
    SH_LEDR = 0;
    LEDR->data = 0;
}

void show_RUN ( bits RUN ) {
    SH_LEDR = putbit (SH_LEDR, RUN, 12);
    LEDR->data = SH_LEDR;
}

Got it with inline assembly using I/O read and writes:

File: switches.c

#include "system.h"
#include "pio_regs.h"
#include "bsu_macros.h"
#include "switches.h"

static struct pio_regs *SW = (struct pio_regs *)SWITCH_BASE;
static REGISTER SH_SW;

bits get_RUN ( void ) {
    //SH_SW = SW->data;
    __asm("ldwio %0, %1" : "=r"(SH_SW) : "m"(SW->data));
    return getbit(SH_SW, 17);
}

File: ledr.c

#include "system.h"
#include "pio_regs.h"
#include "bsu_macros.h"
#include "ledr.h" 

static struct pio_regs *LEDR = (struct pio_regs *)LEDR_BASE;
static REGISTER SH_LEDR;

void LEDR_Init ( void ) {
    SH_LEDR = 0;
    //LEDR->data = 0;
    __asm("stwio %0, %1" : "=r"(SH_LEDR) : "m"(SW->data));
}

void show_RUN ( bits RUN ) {
    SH_LEDR = putbit (SH_LEDR, RUN, 12);
    //LEDR->data = SH_LEDR;
    __asm("stwio %0, %1" : "=r"(SH_SW) : "m"(SW->data));
}

It might help to outline what resources you have looked at and how they aren't or are helping you... — Jordan Dea-Mattson, Apr 04 '13 at 20:44
Yikes, you appear to be the only person ever (on the internet) to ask this question. Congratulations! BTW, I assume you have this book http://www.altera.com/literature/hb/nios2/n2cpu_nii5v1.pdf See page 2-14 for a description of what you're trying to do. — KevinDTimm, Apr 04 '13 at 21:06
Thanks KevinD lol. The resources I've looked at talk about some methods, but provide no examples. Like using the bit-31 method. I know that changing bit 31 (the MSB) will bypass the cache, but they never show an example of how to do this in C. Or using some macros which don't exist on this Nios because we aren't using HAL — Jason McKindly, Apr 04 '13 at 21:13
You're probably stuck with Altera support - they have to have examples of how this is supposed to be done. BTW, it seems all their example code is assembly, maybe a gcc group specific to this processor exists and can help with your query? — KevinDTimm, Apr 04 '13 at 21:17

phuclv · Answer 1 · 2019-07-03T15:20:56.903

You can use -mno-cache-volatile and declare the variable as volatile. In fact MMIOs that are achieved by reading/writing some registers must always be volatile.

-mno-cache-volatile

-mcache-volatile

Volatile memory access bypass the cache using the I/O variants of the load and store instructions. The default is not to bypass the cache.

https://gcc.gnu.org/onlinedocs/gcc/Nios-II-Options.html

Another option is always bypass the cache by -mbypass-cache

See

Bypassing the Data cache in a Nios II Processor

File: switches.c

File: ledr.c

File: switches.c

File: ledr.c

1 Answers1