Compiling C programs under different directories using Makefiles

Question

I have a doubt on compiling C code which is distributed under different source folders. My project structure is as follows

root directory---> Project
sub-directory--> include => add.h sub.h
sub-directory--> source => add.c sub.c
sub-directory--> src => main.c crc.c spi.c

How do I write a simple makefile to compile and link the sources in different directories to create an executable file?

Just a logical Q: what's the purpose of `src` and `source` being seperate directories? — Sourav Ghosh, Feb 23 '15 at 07:44
It's straightforward. What have you tried and how did it fail? — tripleee, Feb 23 '15 at 07:55

score 2 · Answer 1 · answered Feb 23 '15 at 10:23

2

You can just list paths to all your source files in a Makefile:

SOURCES=\
    src/main.c \
    src/crc.c \
    src/spi.c \
    sources/add.c \
    sources/sub.c

answered Feb 23 '15 at 10:23

el.pescado - нет войне

18,889
4
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score 0 · Answer 2 · answered Feb 23 '15 at 08:01

Here is a fundamental makefile sample you could use. Clean is suggested to remove the compiled executables

 # ------------------------------------------------
 # Generic Makefile
 #
 # Author: yanick.rochon@gmail.com
 # Date  : 2010-11-05
 #
 # Changelog :
 #   0.01 - first version
 # ------------------------------------------------

 # project name (generate executable with this name)
 TARGET   = projectname

 CC       = gcc -std=c99 -c
 # compiling flags here
 CFLAGS   = -Wall -I.

 LINKER   = gcc -o
 # linking flags here
 LFLAGS   = -Wall

 SOURCES  := $(wildcard *.c)
 INCLUDES := $(wildcard *.h)
 OBJECTS  := $(SOURCES:.c=*.o)
 rm       = rm -f

 $(TARGET): obj
 @$(LINKER) $(TARGET) $(LFLAGS) $(OBJECTS)
 @echo "Linking complete!"

 obj: $(SOURCES) $(INCLUDES)
 @$(CC) $(CFLAGS) $(SOURCES)
 @echo "Compilation complete!"

 clean:
      @$(rm) $(TARGET) $(OBJECTS)
      @echo "Cleanup complete!"

This would compile all the files in a directory with a particular file extension.

P.S: If you name the file as "makefile", all you have to do to execute the file is to write "./make" on the linux terminal prompt.

score 0 · Answer 3 · edited May 23 '17 at 11:58

0

It seems that you will have to place a separate makefile in each sub-directory and recursively call each once starting from the root directory. Gnu mentions the recursive makefile here: https://www.gnu.org/software/make/manual/html_node/Recursion.html

There may, however, be reasons not to do such a thing. Some specific examples are mentioned here: http://miller.emu.id.au/pmiller/books/rmch/

You also may choose to hardcode the paths into your makefile like this user did: Makefile: Compiling from directory to another directory

edited May 23 '17 at 11:58

Community

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answered Feb 23 '15 at 08:31

ghrs

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@el.pescado: Your URL is appearing in the question – Basile Starynkevitch Feb 23 '15 at 10:28

Compiling C programs under different directories using Makefiles

3 Answers3