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Is there no ability to have a 64 bit stack for ARMv8? I understand there is no push and pop instructions on AArch64 so is stack management left to AArch32 for parameter passing and such? How can we pass the 48 bit addresses? I'm overall confused how function calls will work when operating in AArch64.

Oak Bytes
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bburgess
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  • As per [this document](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0024a/ch08s02s01.html) you can use LDP/STP or just LDR/STR. See also [this](http://infocenter.arm.com/help/topic/com.arm.doc.den0024a/ch06s03s05.html) and the [ABI](http://infocenter.arm.com/help/topic/com.arm.doc.den0024a/CHDGIGJG.html) – Jester Jul 10 '15 at 17:52

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Much like in 32-bit*, SP is a valid base register for any load/store instruction, so the mechanics aren't all that different. What is different is that SP is no longer a general-purpose register you can do whatever you want with, you don't have variable load/store-multiple operations any more, and there are no programmer-friendly aliases. Thus a typical "push" would be:

stp xn, xm, [sp, #-16]!

Note that you should generally use stp/ldp in favour of str/ldr in order to maintain alignment when operating on the stack (and especially when you have the hardware alignment checking turned on) - if you only have one register you care about, push/pop xzr as the other to fill the gap.

* Remember that e.g. "push" in the ARM instruction set is just an assembler alias for stmdb r13!, {rn, ..., rm} or str rn, [sp, #-4]! as appropriate, and such aliases were only introduced with the unified assembly language as part of Thumb-2. Specific push/pop instructions did appear in original 16-bit Thumb, as SP can't be encoded in the normal load/store ops there which only operate on low registers.

Notlikethat
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  • The store pair instruction here doesn't modify the stack pointer, correct? So we still need to increment it if necessary? I read it as: "Store xn and then xm at the address pointed to by sp - 16 bytes" – bburgess Jul 15 '15 at 16:43
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    You've overlooked the `!` syntax on the base register, which means "...and write sp-16 back to sp". That's what makes the difference between the pre-indexed and offset addressing modes. – Notlikethat Jul 15 '15 at 17:22
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    @Notlikethat, "if you only have one register you care about, push/pop xzr". For one register only better to use `str xn, [sp, #-16]!` – user3124812 Dec 29 '15 at 06:34