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I've read the other posts here, but still have a question about PPC and rlwinm.

The example I'm looking at is:

li  r0, 0x100
clrlslwi  r9, r0, 27,5 (which afaik is the same as rlwinm r9, r0,5,22,26)

First I load r0 = 0x100 Then Left Shift r0 by 5 so r0 = 0x2000 (No overflow, so no rotate needed)

Make a Mask with bits 22 to 26 set = 0x3e0

AND r0 with the Mask = 0x2000 AND 0x3E0 = 0

I must be doing something wrong...this would always net 0 What am I missing?

Cœur
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  • You should format your question (wrap inline code segments in backticks, prefix code blocks with four spaces) and include the actual code you're having trouble with. – miken32 Apr 15 '16 at 23:11
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    Yah, the value is always 0. So is 2 - 2. What's the problem? – Ross Ridge Apr 16 '16 at 01:25
  • Is it just me, or are PPC mnemonics *way* harder to decipher than most other architectures? It was pretty obvious from looking at compiler output what most of the insns do in something like ARM asm, even before I learned much of anything about ARM. But PPC just looks like gibberish. – Peter Cordes Apr 16 '16 at 08:33
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    @PeterCordes: Well, ARM used the excess bits in their 32-bit instructions for predicated execution, PPC used them to make instructions do more complex operations. Guess which ISA needed to be completely redone for 64-bit. – EOF Apr 16 '16 at 11:20
  • Your analysis looks correct. But what's the question? – mpe Apr 22 '16 at 04:20
  • My question is, since this is just going to result in 0, why so many instructions? Like RR said above, why not just li r0,0 ? I guess this just showing how inefficient the compiler used to make this code is. –  May 15 '16 at 19:43

1 Answers1

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yes that's true (Clear left and shift left word immediate)

clrlslwi rA,rS,b,n (n ≤ b ≤ 31) = rlwinm rA,rS,n,b – n,31 – n

so clrlslwi r9, r0, 27,5 = rlwinm r9, r0, 5, 22(27-5), 26(31-5)

Omar Semchedine
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