In contrast to x86, no exception is thrown for arm if an integer division by zero takes place. There is simply returned 0 as the result
Edit: This only applies to the Cortex-A series. As Jose noted, there is a control register for integer division in the Cortex-M series, as in the case of Floating-point division described in the following. See the link in his answer.
For floating point operations, the Floating-point Control Register (FPSCR for aarch32 or FPCR for aarch64) is decisive for whether an exception is thrown. If the corresponding bit is set there, an exception is thrown, otherwise only a flag in the Floating-Point Status Register (FPSCR in aarch32 or FPSR in aarch64) is set which then indicates the error. This registers can be set via msr and read via mrs.
If no exception is thrown, there are the following rules:
infinity divided infinity is NaN
zero divided zero is NaN
- Anything other divided
infinity is ±zero
- Anything other divided
zero in ±infinity (sign according to the dividend,
this is the case you got in your screenshot)
infinity divided anything other is ±infinity
zero divided anything other is ±zero
See the pseudocode of FDIV in ARM a64 instruction set architecture.
References: