I read the following paragraph in Mike Myers CompTIA A+ book:
Modern DRAM sticks come in 32-bit and 64-bit-wide data form factors with a varying number of chips. Many techs describe these memory modules by their width, so we call them x32 and x64. Note that this number does not describe the width of the individual DRAM chips on the module.
I am not sure what each of these terms refers to. What is data form factor and stick width, and what what is DRAM chip width?
A DRAM stick, or DRAM DIMM, is comprised of several DRAM chips. Each DRAM chip has a "width", which refers to the number of bits that can be transferred into/out of the DRAM chip in each cycle (more on this later), or the number of data pins on the chip (also called DQ pins in many cases). For example, x4 (4-bit wide interface), or x8 DDR3 chips.
The width of the DRAM DIMM is thus determined by the number of DRAM chips on the DIMM, so if there are N chips, each with a xM interface, you have a N*M wide DRAM DIMM. Typically, this width is defined by JEDEC. Typically, non-ECC DDR3/DDR4 DIMMs are 64-bits wide, so eight x8 DRAM chips, or 16 x4 DRAM chips. ECC DIMMS have an extra chip on them and are 72-bits wide.
In general, a single DRAM request (a RD command or CAS command), returns 64Bytes of data (a typical cache-line size) from the DRAM - so on a 64-bit wide DIMM, it takes 8 transfers to get the data - or 8 beats of data. If the DIMM is comprised of x8 devices, then each device contributes 8 bits to each beat, and 64 bits overall.
Different systems have different constraints/requirements that define what width of DIMM or memory they want to use. For example, in GPUs, for the most part, there are no DIMMs involved, but the GDDR5 memory chips are directly soldered onto the PCB with the GPU. Each GDDR5 there is a x32 part - and sometimes two of them are ganged up to form a single 64-bit wide memory channel.
A reasonable summary exists in the following paper, but there are many other sources of this information. http://niladrish.org/pubs/isca10.pdf (see Sec-2.1)
Bruce Jacobs' book "Memory Systems: Cache, DRAM, Disk" is a very good textbook on these topics.
I am not sure what each of these terms refers to. What is data form factor and stick width, and what what is DRAM chip width?
Data form factors mean exactly what is implied. ECC and non-ECC is an example of data form factors.
The memory chips on a SDRAM PCB come in a variety of data bus sizes. The combination of those chips up to 168 pins is the data bus size of the SDRAM module.
Chips are made with a variety of data bus sizes (most commonly 4, 8 or 16 bits), but chips are generally assembled into 168-pin DIMMs that read or write 64 (non-ECC) or 72 (ECC) bits at a time.
