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I was recently looking at the page table architecture in x86 and x86-32 machines.

x86-32 paging architecture: x86-32 paging architecture

x86-64 paging architecture: x86-64 paging architecture

In x86 for example, we use 10 bits as offset into the page directory/page table. This means we can index 1K entries in a page directory/page table. But given that page directory and page table addresses have to be page aligned os's have to allocate 4K memory for page directories/tables

Is my understanding correct/ did I mess up the math somewhere.

If my understanding is correct, I have two followups

  1. If we have a lot of processes in a system( and thereby a lot of page directories and tables) isn't this a lot of wasted memory
  2. Are there any OS implementations that do interesting things with this 3k memory thats inaccessible
Markus Meyer
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deepak arumugam
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1 Answers1

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In x86, each page table entry is mostly* a pointer. Each pointer is 4 bytes. Therefore 1K page table entries take up 4K bytes of space, and no space is being wasted.

*Since these pointers have to be 4K aligned, the lower 12 bits are used for other information, such as whether the CPU is allowed to read/write/execute on those pages and how the pages should be cached.

TheHans255
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