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Rear Panel My motherboard the H110TM-ITX R2.0 offers 4 display connectors:

  1. VGA
  2. HDMI
  3. DisplayPort 1.2
  4. LVDS (internally)

The MoBo's manual states in a footnote, that only 2 connectors can be used simultaneously. Although the CPU i5-6500T I'm currently using is capable of handling 3 monitors at the same time. I heard about the number of sync clocks as a limiting factor. But where are these components located: on the motherboard or -even unexpectedly- the iGPU itself?

And of course I tried to plug in three monitors but naturally one of them switched off. I even tried a DisplayPort-to-2x-HDMI hub to outwit the limitation. The monitors at the hub worked fine, but adding any other monitor at any other connector failed again.

So, I cannot use the full power of the iGPU because of only 2 provided sync clocks whereever these clocks are. Or is there even a potential way to outwit this limit other than using DisplayLink (connecting monitors via USB)? Or could it be that the DisplayPort hub was not properly configurated because MST needs to be activated in Linux?

inspector
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1 Answers1

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Intel's specification page for your processor indicates the iGPU is called Intel HD Graphics 530 and it directly supports eDP/DP/HDMI/DVI display connections, with a maximum of 3 displays supported. Your CPU is of the Skylake generation.

Note that VGA and LVDS are not mentioned here: if your (unspecified) motherboard offers these, the motherboard must implement them by including a signal converter external to the CPU/chipset that will create the VGA and/or LVDS signals out of some display connection type that is supported directly by the iGPU.

What you heard about "sync clocks" probably refers to the situation of the older (Ivy Bridge, i.e. more than 2 CPU generations older than yours) Intel CPUs: the iGPUs of those processors did have 3 graphics processing pipelines, but the chipsets for those processors included only 2 Phase-Locked Loops for generating the pixel clocks for displays.

This limitation could be worked around by choosing your displays such that at least two of them could share a pixel clock: either by using at least two DisplayPort connections (with no passive adapters), or by having two or more exactly identical non-DisplayPort connection types connected to identical monitors, so that the exact same pixel clock could apply to both.

(Reference: Wikipedia)

But in the Skylake generation of CPUs and chipsets, this limitation should no longer be present. That would suggest the limiting factor to be the motherboard design. For whatever reason (market segmentation? requirement to minimize the number of motherboard wiring layers to drive manufacturing costs down?), the motherboard designer may have left the outputs of the third graphics pipeline unconnected, and designed the motherboard to only use two of the iGPU's pipelines.

If this is the case, then I'm afraid there is no workaround without replacing the hardware.

telcoM
  • 5,167