What exactly do we mean when we say 64-bits CPU?

Question

Finding some mixed answers on this topic. It seems like it either means how many wires there are on an address bus (so 64 bits would mean 64 wires so we could address 2^64 bits) or how much data we can move at once in a single ALU cycle in a core. What does it really mean?

Answer 1

A 64 bit cpu has 64 address bits in its (internal) address bus.

The reason that there is some confusion is that when the address bus width is increased, all the registers that hold addresses also need to be increased, and typically the data registers are also increased at the same time, especially if address and data registers overlap in use. But there's no reason a 64 bit cpu couldn't have 8 bit data registers.

Note that there are some 64 bit cpus that have 64 bit data registers but still only have an 8 bit data bus. These cpus load data one byte at a time into a possible multi-byte data register, either with a single or multiple instructions. There's not really a functional need for a 64 bit external data bus, but it is faster to load those bytes in parallel instead of sequentially.

Some embedded cpus might be 64 bit to address >4G of memory but still have an 8 bit (or even 1 bit -- with serial ram!) external data bus because it is optimized for physical size rather than speed. This is even more likely if the embedded cpu also includes a significant amount of internal ram and the external ram is optional.

The 64 bit address bus is critical for addressing large amounts of memory. However, just like the data bus, this could be an internal register thing and externally the cpu could multiplex the bytes out sequentially same as is sometimes done with the data bus. This works, it's just slower. Also, even with higher speed cpus, some support a mode where a start address is asserted on the bus once and then a large block of ram is clocked into cache lines sequentially without an incrementing address on an address bus.

Similarly, the internal 64 bit address bus might actually be a 58 bit external address bus with a 64 bit wide data bus, so it loads or saves 8 aligned bytes at once on every read/write, not needing the extra address bits to address within those 8 bytes. (And if you try to load misaligned bytes, you get a bus error signal.) A processor like this might add extra addressing modes that still load 8 bytes into a cache line on a read, but then only copy 4 or 2 or 1 of those bytes out of cache into a register. It might support misaligned small reads this way, or it might not as this adds extra logic and makes the chip bigger.

Some of the early Intel "64 bit" intel cpus used internal 64 bit address bus, but the external address bus was only 36 bits, so it could only have 64G of external addressable memory, but it could address a much larger amount of virtual memory since the registers were internally still 64 bit.

How this is implemented externally is a balance between speed optimization, pin optimization, and added instruction set complexity. The important thing that makes it 64 bit is that all the addresses and address registers are 64 bit.