How is the connection/communication between northbridge and southbridge like?
It seems that data must pass from the CPU to the northbridge, and then again over a PCI bus to the southbridge, based on a picture from http://en.kioskea.net/contents/pc/bus.php3

It seems that data pass from the CPU to the northbridge, and then again over a internal bus to the southbridge, based on a picture from http://en.wikipedia.org/wiki/Motherboard#Integrated_peripherals

So the two seem to agree with each other. I wonder which one is correct?
Thanks!