I am unfamiliar with hardware. I am studying the IDE disk I/O and DMA on x86. I want to know that when doing a IDE disk I/O with DMA, can other CPUs access the memory (or exactly, the same memory region as the DMA)? Of course, we assume that the OS is so stupid that it does not provides mutex in software.
I learned from wiki that there are three modes of operation, burst mode, cycle stealing modeand transparent mode. And I learned that it is the hardware or the software that is responsible to maintain the cache coherence.
So I want to know in specific with the IDE disk I/O on x86, when doing disk DMA, can other CPUs access the memory? For example a disk DMA wants to transfer data to memory region 0x10~0x30 (that is, in my opinion, the DMA starts transfer at 0x10 and will raise an interrupt when it reaches the 0x30). If now the DMA has transferred 0x10~0x20, can other CPUs modify 0x10~0x20 before the whole DMA finishes?
Thanks very much!
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